Rainbow Electronics DS1957 - Manual (Page 3)

DS1957
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64-BIT LASERED ROM
Each DS1957 contains a unique ROM code that is 64 bits long. The first eight bits are a 1-Wire family
code. The next 48 bits are a unique serial number. The last eight bits are a CRC of the first 56 bits. (See
Figure 3). The 64-bit ROM and ROM Function Control section allow the DS1957 to operate as a 1-Wire
device and follow the 1-Wire protocol detailed in the section “1-Wire Bus System”. The functions
required to operate the microcomputer and accelerator of the DS1957 are not accessible until the ROM
function protocol has been satisfied. This protocol is described in the ROM functions flow chart (Figure
6). The 1-Wire bus master must first provide one of six ROM function commands: 1) Read ROM, 2)
Match ROM, 3) Search ROM, 4) Skip ROM, 5) Overdrive-Skip ROM or 6) Overdrive-Match ROM.
After a ROM function sequence has been successfully executed, the bus master may then provide any one
of the commands specific to the DS1957 (Figure 4).
The 1-Wire CRC of the lasered ROM is generated using the polynomial X 8 + X 5 + X 4 + 1. Additional
information about the Dallas Semiconductor 1-Wire Cyclic Redundancy Check is available in the “Book
of DS19xx iButton Standards.” The shift register acting as the CRC accumulator is initialized to zero.
Then starting with the least significant bit of the family code, one bit at a time is shifted in. After the
eighth bit of the family code has been entered, then the serial number is entered. After the 48th bit of the
serial number has been entered, the shift register contains the CRC value. Shifting in the eight bits of
CRC should return the shift register to all zeroes.
DATA AND CONTROL REGISTERS
From the application software developers perspective, the DS1957 looks like two registers and a buffer
and control logic that are accessed through a 1-Wire bus (Figure 1). After the Intermediate Product
Register (IPR) and the I/O buffer have been loaded with data and control information, the microcomputer
will be started, perform the requested tasks and place the result into the IPR from where it can be read by
the bus master. The data processing inside the DS1957 and the structure of the data packets that tell the
microcomputer what tasks to perform is governed by the ROM firmware. A detailed description of the
firmware functions and data packet formats is found in the “Crypto iButton Firmware Reference
Manual.”
The IPR is normally used to transfer command codes and message data to the microcomputer in blocks of
up to 128 bytes and to receive results back from the microcomputer. The messages themselves may
extend over several blocks. The message transfer management, which includes block number, block
length, bytes remaining, CRC and checksum, is controlled by means of the I/O buffer. During extensive
mathematical operations, the microcomputer will pause after a predefined amount of time and allow the
bus master to read progress information from the status register. The bus master will then signal the
microcomputer to resume computation until the next pause occurs, and so on, until the task is finished.
The duration of the computation time slices is controlled by the True Time Clock. Other functions of the
True Time Clock are date/time stamping of events and imposing expiration dates. The arithmetic
accelerator is optimized for exponentiation, multiplication and squaring. Such operations are typically
required for encryption/decryption of data packets that use the large number theory of public key
cryptography.