Rainbow Electronics DS1616 - Manual (Page 15)

DS1616
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If RO is cleared to a 0, no further data samples will be written to the datalog memory after all datalog
memory registers have been filled. Samples, however, will continue to be taken and the appropriate
histogram registers will be incremented with each sample. Likewise, the temperature and ADC Data
alarms will also continue to function.
TLIE - Temperature Low Interrupt Enable - When set to a logic 1, this bit permits the Temperature Low
Flag (TLF) in the Status 1 register to assert INT . When the TLIE bit is set to logic 0, the TLF bit does
not initiate the INT signal.
THIE - Temperature High Interrupt Enable - When set to a logic 1, this bit permits the Temperature High
Flag (THF) in the Status 1 register to assert INT . When the THIE bit is set to logic 0, the THF bit does
not initiate the INT signal.
AIE - Alarm Interrupt Enable - When set to a logic 1, this bit permits the Alarm Flag (ALMF) in the
Status 1 register to assert INT . When the AIE bit is set to logic 0, the ALMF bit does not initiate the INT
signal.
STATUS 1 REGISTER
MSb LSb
DR MEM
CLR
MIP SIP LOBAT TLF THF ALMF
DR - Data Ready - This bit indicates the status of the data value in the Current Temperature and/or ADC
Data [1-3] registers after the Read Data command has been executed. When this bit is a logic 1, the
DS1616 has completed the measurement of all of the selected channels (CSx = 1) and has written valid
value(s) to the Current Temperature and/or Current ADC Data [1-3] registers. When this bit is a logic 0,
the measurements have not been completed. This bit is cleared to 0 when the Read Data command is
sent.
MEM CLR - Memory Cleared - This bit indicates that the datalog memory, histogram memory,
Temperature Alarm, ADC Channel 1 Data Alarm, Current Samples, Start Time Stamp, Start Delay, and
Sample Rate registers are all cleared to 0. MEM CLR is cleared to 0 when a datalog mission is started
(i.e., MIP = 1).
MIP - Mission in Progress - This bit indicates the sampling status of the DS1616. If MIP is a logic 1, the
device is currently on a “mission” in which it is operating in the data logging mode. The MIP bit is
changed to a logic 1 immediately following 1) the writing of a non-0 value to the Sample Rate register
when the SE bit is a 0 or 2) a falling edge on the
ST pin if the Sample Rate register contains a non-0
value AND the SE bit is a 1.
If MIP is a logic 0, the DS1616 is not currently in datalogging mode. The MIP bit transitions from a
logic 1 to a logic 0 whenever datalogging is stopped. Datalogging is stopped
when the DS1616 is cleared
via the clear bit and clear instruction or when any of the RTC or Control registers (with the exception of
the Status registers) are written to during a mission. The MIP bit can also be written to a logic 0 by the
end user to stop datalogging. It cannot, however, be written to a logic 1.