Chip information, Pin configuration package information – Rainbow Electronics MAX15051 User Manual
Page 14
MAX15050/MAX15051
High-Efficiency, 4A, 1MHz, Step-Down Regulators
with Integrated Switches in 2mm x 2mm Package
14
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Soft-Starting Into a Prebiased Output
The MAX15050/MAX15051 can soft-start into a prebi-
ased output without discharging the output capacitor.
In safe prebiased startup, both low-side and high-side
switches remain off to avoid discharging the prebiased
output. PWM operation starts when the voltage on
REFIN/SS crosses the voltage on FB. The PWM activity
starts with the low-side switch turning on first to build
the bootstrap capacitor charge. Power-good (PWRGD)
asserts 48 clock cycles after FB crosses 92.5% of the
final regulation set point. After 4096 clock cycles, the
MAX15050 switches from prebiased safe-startup mode
to either a skip mode or a forced PWM mode depend-
ing on whether the inductor current reaches zero. The
MAX15051 switches from the prebiased safe-startup
mode to forced PWM mode regardless of inductor cur-
rent level.
The MAX15051 also can start into a prebiased voltage
higher than the nominal set point without abruptly dis-
charging the output. This is achieved by using the sink
current control of the low-side MOSFET, which has four
internally set sinking current-limit thresholds. An internal
4-bit DAC steps through these thresholds, starting from
the lowest current limit to the highest, in 128 clock
cycles on every power-up.
PCB Layout Considerations and
Thermal Performance
Careful PCB layout is critical to achieve clean and sta-
ble operation. It is highly recommended to duplicate
the MAX15050/MAX15051 evaluation kit layout for opti-
mum performance. If deviation is necessary, follow
these guidelines for good PCB layout:
1) Place capacitors on IN, V
DD
, and REFIN/SS as
close as possible to the device and the corre-
sponding bump using direct traces.
2) Keep the high-current paths as short and wide as
possible. Keep the path of switching current short
and minimize the loop area formed by LX, the out-
put capacitors, and the input capacitors.
3) Connect IN, LX, and GND separately to a large
copper area to help cool the device to further
improve efficiency and long-term reliability.
4) Ensure all feedback connections are short. Place
the feedback resistors and compensation compo-
nents as close to the device as possible.
5) Route high-speed switching nodes, such as LX and
BST, away from sensitive analog areas (FB, COMP).
Chip Information
PROCESS: BiCMOS
WLP
GND
IN
IN
GND
A1
A2
A3
A4
B1
B2
B3
B4
C1
C2
C3
C4
D1
D2
D3
D4
LX
LX
V
DD
LX
I.C.
I.C.
EN
BST
PWRGD
FB
COMP
REFIN/SS
TOP VIEW
(BUMPS ON BOTTOM)
MAX15050/MAX15051
Pin Configuration
Package Information
For the latest package outline information and land patterns,
“-” in the package code indicates RoHS status only. Package
drawings may show a different suffix character, but the drawing
pertains to the package regardless of RoHS status.
PACKAGE
TYPE
PACKAGE
CODE
OUTLINE NO.
LAND
PATTERN NO.
16 WLP
W162C2+1
—