Texas Instruments TMS320C6712D - Manual (Page 27)

TMS320C6712D
FLOATINGĆPOINT DIGITAL SIGNAL PROCESSOR
SPRS293A − OCTOBER 2005 − REVISED NOVEMBER 2005
27 POST OFFICE BOX 1443
•
HOUSTON, TEXAS 77251−1443
Terminal Functions (Continued)
SIGNAL
PIN
NO.
TYPE†
IPD/
‡
DESCRIPTION
SIGNAL
NAME GDP/
ZDP
TYPE†
IPD/
IPU‡
DESCRIPTION
EMIF − ASYNCHRONOUS/SYNCHRONOUS DRAM/SYNCHRONOUS BURST SRAM MEMORY CONTROL (CONTINUED)#
ARE/SDCAS/
SSADS
V11 O/Z IPU Asynchronous memory read enable/SDRAM column-address strobe/SBSRAM address strobe
AOE/SDRAS/
SSOE
W10 O/Z IPU Asynchronous memory output enable/SDRAM row-address strobe/SBSRAM output enable
AWE/SDWE/
SSWE
V12 O/Z IPU Asynchronous memory write enable/SDRAM write enable/SBSRAM write enable
ARDY Y5 I IPU Asynchronous memory ready input
EMIF − ADDRESS#
EA21 U18
EA20 Y18
EA19 W17
EA18 Y16
EA17 V16
EA16 Y15
EA15 W15
EA14 Y14
EMIF external address
EA13 W14
EMIF external address
Note: EMIF address numbering for the device start with EA2 to maintain signal name compati-
EA12 V14
O/Z IPU
Note: EMIF address numbering for the device start with EA2 to maintain signal name compati-
bility with other C671x devices (e.g., C6711, C6713) [see the 16−bit EMIF addressing scheme in
EA11 W13
O/Z IPU
bility with other C671x devices (e.g., C6711, C6713) [see the 16−bit EMIF addressing scheme in
the TMS320C6000 DSP External Memory Interface (EMIF) Reference Guide (literature num-
ber SPRU266)].
EA10 V10
the TMS320C6000 DSP External Memory Interface (EMIF) Reference Guide (literature num-
ber SPRU266)].
EA9 Y9
EA8 V9
EA7 Y8
EA6 W8
EA5 V8
EA4 W7
EA3 V7
EA2 Y6
EMIF − DATA#
ED15 T19
ED14 T20
ED13 T18
I/O/Z IPU External data
ED12 R20
I/O/Z IPU External data
ED11 R19
ED10 P20
† I = Input, O = Output, Z = High impedance, S = Supply voltage, GND = Ground, A = Analog signal (PLL Filter)
‡ IPD = Internal pulldown, IPU = Internal pullup. [To oppose the supply rail on these IPD/IPU signal pins, use external pullup or pulldown resistors
no greater than 4.4 k Ω and 2.0 k Ω , respectively.]
# To maintain signal integrity for the EMIF signals, serial termination resistors should be inserted into all EMIF output signal lines.