Premio Computer Apollo/Shadowhawk - Manual (Page 50)

Product Description
27
OM12389
82801BA
I/O Controller Hub
(ICH2)
USB ports (2)
USB
Back panel USB connectors
adjacent to the audio connectors
USB ports (2) Front panel USB connector
Figure 6. USB Port Configuration for Boards with the SMSC LPC47M132 I/O Controller
For information about Refer to
The location of the USB connectors on the back panel Figure 10, page 54
The signal names of the back panel USB connectors Table 19, page 55
The location of the front panel USB connector Figure 15, page 70
The signal names of the front panel USB connector Table 43, page 71
The USB specification and UHCI Section 1.5, page 18
1.8.3 IDE Support
1.8.3.1 IDE Interfaces
The ICH2’s IDE controller has two independent bus-mastering IDE interfaces that can be
independently enabled. The IDE interfaces support the following modes:
• Programmed I/O (PIO): processor controls data transfer.
• 8237-style DMA: DMA offloads the processor, supporting transfer rates of up to 16 MB/sec.
• Ultra DMA: DMA protocol on IDE bus supporting host and target throttling and transfer rates
of up to 33 MB/sec.
• ATA-66: DMA protocol on IDE bus supporting host and target throttling and transfer rates of
up to 66 MB/sec. ATA-66 protocol is similar to Ultra DMA and is device driver compatible.
• ATA-100: DMA protocol on IDE bus allows host and target throttling. The ICH2’s ATA-100
logic can achieve read transfer rates up to 100 MB/sec and write transfer rates up to
88 MB/sec.
✏
NOTE
ATA-66 and ATA-100 are faster timings and require a specialized cable to reduce reflections,
noise, and inductive coupling.
The IDE interfaces also support ATAPI devices (such as CD-ROM drives) and ATA devices using
the transfer modes listed in Section 4.4.4.1 on page 107.
The BIOS supports Logical Block Addressing (LBA) and Extended Cylinder Head Sector (ECHS)
translation modes. The drive reports the transfer rate and translation mode to the BIOS.