SMSC FlexPWR LAN8720 - Manual (Page 56)

Small Footprint RMII 10/100 Ethernet Transceiver with HP Auto-MDIX Support
Datasheet
Revision 1.0 (05-28-09) 56 SMSC LAN8720/LAN8720i
DATASHEET
6.2 RMII 10/100Base-TX/RX Timings (50MHz REF_CLK IN)
The 50MHz REF_CLK IN timing applies to the case when nINTSEL is floated or pulled-high on the
LAN8720. In this mode, a 50MHz clock must be provided to the LAN8720 CLKIN pin. For more
information on REF_CLK IN Mode, see
Section 4.7.1 .
6.2.1 RMII 100Base-T TX/RX Timings (50MHz REF_CLK IN)
6.2.1.1 100M RMII Receive Timing (50MHz REF_CLK IN)
Figure 6.2 100M RMII Receive Timing Diagram (50MHz REF_CLK IN)
Table 6.2 100M RMII Receive Timing Values (50MHz REF_CLK IN)
PARAMETER DESCRIPTION MIN TYP MAX UNITS NOTES
T6.1 Output delay from rising edge of
CLKIN to receive signals output
valid 3 10 ns
CLKIN frequency 50 MHz
Clock In -
CLKIN
Data Out -
RXD[1:0]
CRS_DV
Valid Data
T
6.1