SOYO SY-5S - Manual (Page 52)

BIOS Setup Utility SY-5STM
48
3-3 CHIPSET FEATURES SETUP
Caution: Change these settings only if you are already
familiar with the Chipset.
The [CHIPSET FEATURES SETUP] option changes the values of
the chipset registers. These registers control the system options in
the computer.
After you have completed the changes, press [Esc] and follow the
instructions on your screen to save your settings or exit without
saving.
The following table describes each field in the CHIPSET
FEATURES SETUP Menu and how to configure each parameter.
ROM PCI/ISA BIOS
CHIPSET FEATURES SETUP
AWARD SOFTWARE, INC.
CPU to PCI Burst Mem. WR
ISA Bus Clock Frequency
System BIOS Cacheable
Video BIOS Cacheable
Memory Hole At 15M-16M
VGA Shared Memory Size
VGA Memory Clock (MHz)
Linear Mode SRAM Support
: Disabled
: PCICLK/4
: Enabled
: Enabled
: Disabled
: 1 MB
: 55
: Disabled
ESC
F1
F5 : Quit
: Help
: Old Values
PU/PD/+/-
(Shift) F2
: Select Item
: Modify
: Color
Auto Configuration
L2 (WB) Tag Bit Length
SRAM Back-to-Back
NA# Enable
Starting Point of Paging
Refresh Cycle Time (us)
RAS Pulse Width Refresh
RAS Precharge Time
RAS to CAS Delay
CAS# Pulse Width (FP)
CAS# Pulse Width (EDO)
RAMW# Assertion Timing
CAS Precharge Time (FP)
CAS Precharge Time (EDO)
SDRAM WR Retire Rate
SDRAN Wait State Control
Enhanced Memory Write
Read Refresh Memory RD
CPU to PCI Post Write
: Enabled
: 7bits
: Enabled
: Enabled
: 1T
: 15.6
: 6T
: 3T
: 3T
: 2T
: 1T
: 3T
: 1T/2T
: 1T/2T
: X-2-2-2
: 1WS
: Disabled
: Enabled
: 4T
F6
F7 : Load BIOS Defaults
: Load Setup Defaults