Intel 8 LAN - Manual (Page 17)

17
ICH8—NVM Information Guide
Table 16, “LED Modes” above summarizes the LED modes defined in bits 3:0 of this
word.
1.4.21 Future Initialization Word 1 (Words 19h)
1.4.22 Future Init Word 2 (Word 1Ah)
Bit Name Default Description
7 LED0 Blink 1b
This bit indicates the initial value of the LED0_BLINK field.
0b = LED0 is non-blinking (recommended).
1b = LED0 is blinking.
6 LED0 Invert 0b
This bit indicates the initial value of the LED0_IVRT field.
0b = LED0 has an active low output.
1b = LED0 has an active high output.
5 LED0 Blink Mode 0b
This bit define the LED0 blink mode:
0b = Blink at 200 ms on and 200 ms off.
1b = Blink at 83 ms on and 83 ms off.
Note: This field initializes the GLOBAL_BLINK_MODE field in the
LEDCTL register.
4 Reserved 0b This bit is reserved and should be set to 0b.
3:0 LED0 Mode 0100b
These bits represent the initial value of the LED0_MODE field,
which specifies the event, state, or pattern displayed on LED0
(Link/Activity) output. Table 16 defines the values for LED0 Mode.
Table 17. LED 0 and 2 Configuration Defaults (Word 18h)
Bit Name Default Description
15:0 Reserved X
This field is loaded to bits 15:0 of the FEXTNVM register.
For the 82562V, must be set to 301h.
For 82566 SKUs that include ACBS, must be set to 181h.
For 82566 SKUs without ACBS, must be set to 301h.
Bit Name Default Description
15:0 Reserved X
Reserved
This field is loaded to bits 15:0 of the FEXTNVM register.
For ICH8, set these bits to 0800h.
For ICH8M:
All 82566 SKUs that include ACBS, must be set to 0803h.
All 82566 SKUs without ACBS, must be set to 2803h.