MSI NVIDIA MS-7504PV - Manual (Page 46)

3-18
MS-7504 Mainboard
IRQ 3/ 4/ 5/ 7/ 9/ 10/ 11/ 14/ 15
These items specify the bus where the specified IRQ line is used. The settings
determine if AMI BIOS should remove an IRQ from the pool of available IRQs
passed to devices that are configurable by the system BIOS. The available IRQ
pool is determined by reading the ESCD NVRAM. If more IRQs must be removed
from the IRQ pool, the end user can use these settings to reserve the IRQ by
assigning an [Reserved] setting to it. Onboard I/O is configured by AMI BIOS. All
IRQs used by onboard I/O are configured as [Available]. If all IRQs are set to
[Reserved], and IRQ 14/15 are allocated to the onboard PCI IDE, IRQ 9 will still
be available for PCI and PnP devices.
Important
IRQ (Interrupt Request) lines are system resources allocated to I/O devices.
When an I/O device needs to gain attention of the operating system, it
signals this by causing an IRQ to occur. After receiving the signal, when the
operating system is ready, the system will interrupt itself and perform the
service required by the I/O device.