Channel a/b timing settings static tread value, Trd phase0 adjustment, Trd phase1 adjustment – GIGABYTE GA-EP45-UD3LR User Manual
Page 42: Trd phase2 adjustment, Trd phase3 adjustment, Trd2rd(different rank), Twr2wr(different rank), Twr2rd(different rank), Trd2wr(same/diff rank), Dimm1 clock skew control
GA-EP45-UD3LR/UD3L Motherboard
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>>>>> Channel A/B
Channel A/B Timing Settings
Static tRead Value
Options are: Auto (default), 1~15.
tRD Phase0 Adjustment
Options are: Auto (default), 0-Normal, 1-Advanced.
tRD Phase1 Adjustment
Options are: Auto (default), 0-Normal, 1-Advanced.
tRD Phase2 Adjustment
Options are: Auto (default), 0-Normal, 1-Advanced.
tRD Phase3 Adjustment
Options are: Auto (default), 0-Normal, 1-Advanced.
Trd2rd(Different Rank)
Options are: Auto (default), 1~15.
Twr2wr(Different Rank)
Options are: Auto (default), 1~15.
Twr2rd(Different Rank)
Options are: Auto (default), 1~15.
Trd2wr(Same/Diff Rank)
Options are: Auto (default), 1~15.
DIMM1 Clock Skew Control
Options are: Auto (default), +800ps~-700ps.
DIMM2 Clock Skew Control
Options are: Auto (default), +800ps~-700ps.
CMOS Setup Utility-Copyright (C) 1984-2008 Award Software
Channel A Timing Settings
: Move
Enter: Select
+/-/PU/PD: Value
F10: Save
ESC: Exit
F1: General Help
F5: Previous Values
F6: Fail-Safe Defaults
F7: Optimized Defaults
x
Static tRead Value
6
Auto
x
tRD Phase0 Adjustment
1
Auto
x
tRD Phase1 Adjustment
0
Auto
x
tRD Phase2 Adjustment
1
Auto
x
tRD Phase3 Adjustment
1
Auto
x
Trd2rd(Different Rank)
6
Auto
x
Twr2wr(Different Rank)
6
Auto
x
Twr2rd(Different Rank)
5
Auto
x
Trd2wr(Same/Diff Rank)
8
Auto
x
DIMM1 Clock Skew Control
Auto
x
DIMM2 Clock Skew Control
Auto
x
DDR Write Training
Auto
Item Help
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