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Dac chab register 8 0x48, Dac chab register 9 0x49, Dac chab register a 0x4a – Sundance SMT942 User Manual

Page 43

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User Manual SMT942

Page 43 of 55

Last Edited: 23/08/2011 17:25:00

DAC Chab Register 8 0x48.

DAC Chab Register 8 0x48

Byte

Bit 7

Bit 6

Bit 5

Bit 4

Bit 3

Bit 2

Bit 1

Bit 0

1

Qmc offset a[12:8]

Reserved

Default

‘00000’

‘000’

0

Qmc offset b [7:0]

Default

‘00000000


DAC Chab Register 8 0x48

Setting

Bit 7:0

Description QMC offset b[7:0]

0

0

Setting

Bit 15:11

Description QMC offset a[12:8]

0

0


DAC Chab Register 9 0x49.

DAC Chab Register 9 0x49

Byte

Bit 7

Bit 6

Bit 5

Bit 4

Bit 3

Bit 2

Bit 1

Bit 0

1

Ser_dac_data[7:0]

Default

‘00000000’

0

Qmc offset b[12:8]

Reserved

Default

‘00000’

‘000’


DAC Chab Register 9 0x49

Setting

Bit 7:3

Description QMC offset b[12:8]

0

0

Setting

Bit 15:8

Description Ser_dac_data[7:0]

0

0


DAC Chab Register A 0x4A.

DAC Chab Register A 0x4A

Byte

Bit 7

Bit 6

Bit 5

Bit 4

Bit 3

Bit 2

Bit 1

Bit 0

1

Nco_sel

Nco_reg_sel

Qmcorr_reg_sel

Qmoffset_reg_sel

Default

‘00’

‘01’

‘01’

‘01’

0

Ser_dac_data[15:8]

Default

‘00000000’