Avago Technologies ACPL-C870-000E - Manual (Page 4)

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AV02-4293EN - September 11, 2013
In shutdown mode, the ACPL-C87x outputs topple to saturated levels to differentiate from normal operation mode.
Table 1 lists the voltage sensor outputs and the post-amp output when the voltage sensor is on standby.
Table 1.
ACPL-C87x OPA237
V
IN
V
OUT+
V
OUT-
V
OUT+
– V
OUT-
V
OUT
(test conditions)
0 – 3 V 0.005 V 2.75 V -2.74 V 0.23 V
(single 5 V supply)
-2.74 V (dual ±10 V supply, REF-SEL connected to V
REF
);
-2.24 V (dual ±10 V supply, REF-SEL connected to GND2)
Note:
When the board is operated from a dual supply, the V
OUT
can reach -2.74 V when the voltage sensor is shut down. If this voltage is directly
connected to an ADC input, then some means of protection are required to protect the ADC from damage.
Use the Board with Caution
To use the board for bench measurement that involves only a low voltage of several volts from an isolated voltage
source, a user can connect input to P2 directly, without the need of the resistive divider. Adjust the input voltage to an
appropriate level to carry out measurements.
To connect the board to a high voltage source such as a DC-link bus or a photovoltaic panel output, the user can connect
the high voltage nodes to P1 pin 1 and P2 pin 1, using the onboard voltage divider with appropriate resistors mounted
to R1 through R3 footprints. If through-hole resistors are used to implement the voltage divider, the prototyping area
can be used -- connect high voltage across P1 pin 2 and P2 pin 1. With high voltage presence on the board, caution of
electric shock is required when handling the board as the high voltage side is not shielded.
Figure 4 shows an oscilloscope screen shot of a measurement with V
IN
= 0 V to 2 V linear input, and V
OUT
= 0.5 V to 2.5 V
linear output. The difference of 0.5 V is the V
REF
set during calibration.
Figure 4. Scope screen shot of a measurement with 0-2 V linear input