Sundance SMT361 - Manual (Page 7)

Version 2.7 Page 7 of 23 SMT361 SMT361A User Manual
Block Diagram
46 I/O Pins; 16-bit Data
2
x Comm-Po
rt
s/S
D
L
26
I/
O
p
ins
T
im
er,
&
C
ont
ro
l
15
I/
O
p
ins
2
x Comm-Po
rt/
S
DL
52
I/
O
pi
ns
Global Bu
s
74
I/
O
pi
ns
92 pins
FPGA Controller
Virtex-II, FG456
324 I/O Pins
1.5V
'C64xx
DSP
525 pins
JTAG Header
J1 Top Primary TIM
Connector
Comm-Port 0 & 3
J3 Global Expansion
Connector
J2 Bottom Primary TIM
Connector
Comm-Port 1 & 4
McBSP/Utopia/
GPIO
4 LEDs &
4 I/O pins
Flash (EMIFB CE1)
Start-up mode selection.
4 LEDs
Oscillators
Linear regulators
1.5V & 1.2V
32M bytes SDRAM (EMIFA)
4 x K4S641632 (4M x 16)
Sundance Digital Bus
40-way ODU x2
McBSP0