Sundance SMT319 - Manual (Page 3)

Version 1.0.7 Page 3 of 45 SMT319 User Manual
Table of Contents
Revision History ....................................................................................................... 2
Contacting Sundance............................................................................................... 7
Contacting Sundance............................................................................................... 7
Notational Conventions ........................................................................................... 8
C60 ......................................................................................................................... 8
SDB ........................................................................................................................ 8
Register Descriptions.............................................................................................. 8
Outline Description .................................................................................................. 9
Block Diagram ........................................................................................................ 10
Architecture Description........................................................................................ 10
TMS320C6416 ......................................................................................................... 11
Boot Mode............................................................................................................. 11
Flash Boot
......................................................................................................... 11
HPI Boot
............................................................................................................ 11
EMIF Control Registers......................................................................................... 12
SDRAM ................................................................................................................. 13
FLASH .................................................................................................................. 13
Virtex FPGA ...................................................................................................... 13
Reprogramming the firmware and boot code ...................................................... 13
Interrupts................................................................................................................. 14
Sundance Digital Links .......................................................................................... 14
SDB .......................................................................................................................... 14
SDB Clock selection ............................................................................................. 14
Global bus ............................................................................................................... 15
Video interfaces...................................................................................................... 16
Video Output Mode Control Register .................................................................... 22
Video Output Status.............................................................................................. 23
Video Input Status................................................................................................. 24
Output Flag Register............................................................................................. 25
Input Flag Register................................................................................................ 25
Interrupt Control Register...................................................................................... 26