Sundance SMT391 - Manual (Page 13)

Version 1.5 Page 13 of 18 SMT391 User Manual
Diagram
Ref
Pcb
RefDes
Description Notes
H JP2 FPGA JTAG Connector FPGA on SMT338-VP JTAG Chain. Only routed down to
SMT338-VP. Use for easy access without having to remove
the SMT391.
K JP1 MSP JTAG Connector MSP430 on SMT338-VP JTAG Chain. Only routed down to
SMT338-VP. Use for easy access without having to remove
the SMT391.
L U1 Atmel Dual ADC ADC Requires heat-sink with air-flow cooling in a system
setup
I VCO1 UMC 600 – 1000MHz VCO Main Clock source for SMT391. VCO Requires heat-sink
with air-flow cooling in a system setup.
I VCO2 UMC 200 – 350MHz VCO Test Clock for testing the analogue input of the ADC. VCO
Requires heat-sink with air-flow cooling in a system setup.
J TRANS1 M/A Com TP101 Transformer The SMT391 analogue input is AC-coupled through a
twisted pair balum transformer (single ended to differential).
J TRANS2 M/A Com TP101 Transformer The SMT391 analogue input is AC coupled through a twisted
pair balum transformer (single ended to differential).
Figure 9 – Table of Component Locations on SMT391.