Sundance SMT338 - Manual (Page 5)

Version 1.5 Page 5 of 19 SMT338 User Manual
1. Technical description
Figure 1: SMT338 Block diagram
FPGA
XCVxxxxBG352-4
Configuration Logic CPLD
Bottom Primary
Connector
50MHz Oscillator
40 way IDC
SDB_Con1
40 way IDC
SDB_Con2
A[30:0]
Global Bus
Connector
Config Control
Top Primary
Connector
H1
IIOF2
Comm-Port
Control
Comm-Port
1,4,2,5
D[31:0]
Comm-Port 3 Ctrl Comm-Port 3
Config D[7:0]
SDB 2
SDB 1
Comm-Port
50 way High
Density
Diff_Con1 50 way High
Density
Diff_Con2
DIFF1 DIFF2
Differential
Line converters Differential
Line converters