Sundance SMT6035 v.2.2 - Manual (Page 19)

Version 2.2 Page 19 of 39 SMT6035 User Manual
Mb3 MB2 MB1 MB0
Mb7 Mb6 Mb5 Mb4
Mb
11
Mb
10
Mb9 Mb8
Mb
15
Mb
14
Mb
13
Mb
12
PCI Bridge chip registers
Mailbox 0
Mailbox 1
SMT6025
Figure 3 - Mailboxes with the SMT6035
IMPORTANT: Mailbox 1 is used internally by the HSC, leaving only Mailbox 0
available to user applications. See the HSC section 15.
The V3 bridge chip uses interrupts to notify both the PCI and the local bus side of
mailbox activity. The SMT6035 configures these interrupts to provide blocking
mailbox read and write functions on the host. These functions will block until the
DSP performs the required action. When the host side writes to a mailbox, the
write function will block (wait) until the DSP side had read the mailbox value.
Similarly when the host reads a mailbox, the function will block until the DSP
writes a mailbox value.
The host CPU usage is virtually zero during function blocking, as the blocking
behaviour of the mailbox functions is achieved by the use of interrupts.
Although you are free to develop your own mailbox code on the DSP side, we
recommend you to use 3L Diamond
© on the DSP side, as it provides built-in
support for the mailboxes.
14.1 MbWrite
Writes a value to a mailbox.
Prototype
void IFHw::MbWrite( UINT nBox, DWORD dwValue )
Parameters
nBox The target mailbox. Must be zero.
dwValue The value to write to the mailbox.
User Manual - Version 2.2, 04/01/07; © Sundance Italia S.R.L.