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6 operation, 1 front panel led indicators, 6operation – Nevion ARC-SD-DMUX User Manual

Page 24

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ARC-SD-DMUX

Rev. B


nevion.com | 24

6

Operation

6.1 Front panel LED indicators

Diode\s

tate

Red LED

Orange LED

Green LED

No light

Card

status

PTC fuse has

been triggered or

FPGA loading has

failed

FPGA loading. If

constantly lit for

more than a few

seconds: DIPs

15+16 both set to

the ‘On’ position,

or module not

programmed

Module is OK

Module has no

power

SDI

input

status

Video signal

absent

Video signal

present but card

not able to lock

VCXO

Video input signal

in lock

Module not

programmed, or

DIPs 15+16 both

set to the ‘On’

position

Sync

input

status

Sync signal

absent

Sync signal

present but card

unable to lock

VCXO

B&B or Tri-level

sync in lock

Module not

programmed, or

DIPs 15+16 both

set to the ‘On’

position

Audio

input

status

No audio

embedded in

incoming video

One, two or three

audio groups
embedded in

incoming video

4 audio groups

embedded in

incoming video

Module not

programmed, or

DIPs 15+16 both

set to the ‘On’

position

Note that three special conditions also exist: When all four LEDs blink
synchronously, this is the result of the ‘locate on’ command. This condition will
eventually time out but can also be reverted by issuing the ‘locate off’
command.

The second special condition is when an FPGA firmware upgrade is performed:
When Multicon GYDA is finished transferring the compressed data file, the card
will spend some time unpacking this file and during this time it will not respond
to commands or update settings. During this time it will display running lights
(three LEDs lit, one dark, the position of the dark LED will move around).

The last special condition is when the user adjusts the phase delay with the
push buttons at the front of the card. Short flashes on the SYNC or INPUT
LEDs means that the end of the adjustment range has been reached. If they
flash simultaneously, both push buttons have been pressed simultaneously and
the samples part of the phase delay reset to the middle of the adjustment range.

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