Foxconn P4M9007MB-8EKRS2H User Manual
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Chapter 3 BIOS Description
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v
Bank Interleave
This feature enables you to set the interleave mode of the SDRAM interface.
Interleaving allows banks of SDRAM to alternate their refresh and access
cycles. One bank will undergo its refresh cycle while another is being accessed.
v
Precharge to Active (Trp)
This option controls the number of cycles for Row Address Strobe (RAS) to
be allowed to precharge. If insufficient time is allowed for the RAS to
accumulate its charge before DRAM refresh, refresh may be incomplete
and DRAM may fail to retain data. This option applies only when synchro-
nous DRAM is installed in the system.
v
Active to Precharge(Tras)
This option is used to set active to precharge(Tras).
v
Active to CMD
When DRAM is refreshed, both rows and columns are addressed separately.
This setup option allows you to determine the timing of the transition from
RAS (row address strobe) to CAS (column address strobe). The less the
clock cycles, the faster the DRAM performance.
v
REF to ACT/REF (Trfc)
This option is used to set REF to ACT/REF (Trfc).
v
ACT(0) to ACT(1) (TRRD)
This option is used to set ACT(0) to ACT(1) (TRRD).
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