Foxconn P4M8907MA-KRS2H - Manual (Page 34)

Chapter 3 BIOS Description
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DRAM Clock/Drive Control Menu
v 1T CMD Support
This option is used to set whether the first command delay of 1 clock cycle
is enable.
v Current FSB/DRAM Frequency
This option is used to show current FSB and DRAM Frequency.
v DRAM Clock
This option is used to set DRAM clock.
v DRAM Timing
Selects whether DRAM timing is controlled by the SPD (Serial Presence Detect)
EEPROM on the DRAM module. Setting to
“Auto By SPD” enables DRAM tim-
ings to be determined by BIOS based on the configurations on the SPD.
Selecting
“Manual” allows users to configure the DRAM timings manually.
The setting values are:Manual, Auto By SPD, Turbo, Ultra.
v SDRAM CAS Latency [DDR/DDR2]
W hen synchronous SDRAM is installed, the number of clock cycles of CAS
latency depends on the SDRAM timing.
v Bank Interleave
This field selects 2-bank or 4-bank interleave for the installed SDRAM. Dis-
able the function if 16MB SDRAM is installed.
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