Foxconn M7PMX Series - Manual (Page 36)

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so that the motherboard memory controller (chipset) can better access the memory device.
The following 10 settings are valid only when the DRAM Timing Setting is set to [Expert].
► tCL - CAS Latency Time
This item controls the CAS latency, which determines the timing delay (in clock cycles) before
SDRAM starts a read command after receiving it.
► tRCD - RAS# to CAS# Delay
This item allows you to select a delay time (in clock cycles) between the CAS# and RAS#
strobe signals.
► tRP - Row Precharge Time
This item allows you to select the row precharge time (in clock cycles).
► tRAS - RAS# Active Time
This item allows you to set the minimum RAS# active time (in clock cycles).
► Command Per Clock (CMD)
This item allows you to set the Command timing (per clock unit) which is the delay between
chip select and command.
** Advanced Memory Settings **
► tRRD - RAS# to RAS# Delay
This item allows you to select a delay time (in clock cycles) between the RAS# and RAS#
strobe signals.
► tRC - Row Cycle Time
This item allows you to set the row cycle time (in clock cycles). tRC = tRAS + tRP.
► tWR - Write Recovery Time
This item allows you to select the write recovery time (in clock cycles).
► tWTR - Write to Read Delay
This item allows you to select a delay time (in clock cycles) between sending the last data from
a write operation to the memory and issuing a read command.
► tREF - Refresh Period
This item allows you to set refresh period (in clock cycles) for SDRAM. If memory clock is
200MHz, then 200MHz * 7.8 µs = 1560.