beautypg.com

Foxconn 915P7MC-S User Manual

Page 39

background image

Chapter 3 BIOS Description

32

Advanced Chipset Features

™

DRAM Timing Selectable (Default: By SPD)

This item determines DRAM clock/ timing using SPD or manual configuration.
The available setting values are: By SPD and Manual.

™

System BIOS Cacheable (Default: Enabled)

Select “Enabled” to allow caching of the system BIOS which may improve
performance. If any other program writes to this memory area, a system error
may result. The available setting values are: Enabled and Disabled.

™

Video BIOS Cacheable (Default: Disabled)

Select “Enabled” to allow caching of the Video BIOS which may improve
performance. If any other program writes to this memory area, a system error
may result. The available setting values are: Enabled and Disabled.

™

Memory Hole At 15M-16M (Default: Disabled)

This option is used to determine whether the 15M-16M address field of memory
is reserved for the ISA expansion card. The available setting values are: En-
abled and Disabled.

™

FIXED Memory Size (Default: 64MB)

This item is used to set the fixed memory size for onboard VGA used. The
available setting values are: 0MB, 32MB, 64MB, 128MB.

™

DVMT Memory Size (Default: 64MB)

This item is used to set DVMT (Dynamic Video Memory Technology) memory
size. DVMT ensures the most efficient use of available system memory re-
sources for maximum 2D/3D graphics performance. The available setting
values are: 0MB, 32MB, 64MB, 128MB.

Advanced Chipset Features Menu