Foxconn A7GM-S 2.0 - Manual (Page 40)

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performance by masking the refresh cycles of each memory bank.
However, bank interleaving only works if the addresses requested consecutively are not in the
same bank.
► Channel Interleaving
Dual channel (Interleaved) mode offers the highest throughput for real world applications. Dual
channel mode is enabled when the installed memory capacities of both DIMM channels are
equal. If different speed DIMMs are used between channels, the slowest memory timing will be
used.
To achieve Dual Channel Interleaving mode, the following conditions must be met:
Matched DIMM configuration in each channel
Same Density (128MB, 256MB, 512MB, etc.)
1GB
1GB
512MB
1GB
512MB
Channel 0 DIMM1
Channel 1 DIMM2
Channel 0 DIMM3
Channel 1 DIMM4
Channel 0 DIMM1
Channel 1 DIMM2
Channel 0 DIMM3
Channel 1 DIMM4
Matched in both Channel 0 and Channel 1 memory channels
► Enable Clock to All DIMMs
This setting is to control EMI.
When disabled, the system will turn off clock on the empty DIMM slots and to reduce EMI
(Electro-Magnetic Interference).
► MemClk Tristate C3/ALTVID
Enables the DDR memory clocks to be tristated when alternate VID mode is enabled.
► DCT Unganged Mode
DCT stands for DRAM Controller.
Ganged refers to the use of both DRAM controllers within a memory controller acting in con-
cert to access memory. For a description of ganged (128-bit DRAM data width) and unganged
(64-bit DRAM data width) DRAM modes :
Ganged channels (DDR2) :
■ DCT channels A and B can be ganged as a single logical 128-bit DIMM.
■ Offers highest DDR2 bandwidth.
■ Requires both DIMMs in a logical pair to have identical size and timing parameters, both
DCTs programmed identically.
Unganged channels
■ DCT channels A and B operate as two completely independent 64-bit channels (both chan-
nels operate at the same frequency).
■ Reduce DRAM page conflicts – more concurrent open dram pages .
■ Better bus efficiency.
Burst lengths supported