Chapter 4 – DFI CR900-B User Manual
Page 41
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Chapter 4 BIOS Setup
41
Chapter 4
PCH-IO Configuration
PCH LAN Controller
Enables or disables the PCH LAN Controller.
Wake on LAN Enable
Set this field to Enabled to wake up the system via the onboard LAN or via a LAN
card that supports the remote wake up function.
Restore AC Power Loss
Off
When power returns after an AC power failure, the system’s power is off. You must
press the Power button to power-on the system.
On
When power returns after an AC power failure, the system will automatically power-
on.
Former-Sts
When power returns after an AC power failure, the system will return to the state
where you left off before power failure occurs. If the system’s power is off when AC
power failure occurs, it will remain off when power returns. If the system’s power is
on when AC power failure occurs, the system will power-on when power returns.
USB Coniguration
settings.
Aptio Setup Utility - Copyright (C) 2011 American Megatrends, Inc.
Version 2.14.1219. Copyright (C) 2011 American Megatrends, Inc.
Intel PCH RC Version
Intel PCH SKU Name
Intel PCH Rev ID
PCI Express Confi guration
PCH Azalia Confi guration
PCH LAN Controller
Wake on LAN
High Precision Event Timer Confi guration
Restore AC Power Loss
1.1.0.0
QM77
04/C1
[Enabled]
[Disabled]
[Power On]
Chipset
Select Screen
Select Item
Enter: Select
+/-: Change Opt.
F1: General Help
F2: Previous
Values
F3: Optimized
Defaults
ESC: Exit
PCI Express Configuration
Enable or Disable PCI
Express Clock Gating for
each root port.
Aptio Setup Utility - Copyright (C) 2011 American Megatrends, Inc.
Version 2.14.1219. Copyright (C) 2011 American Megatrends, Inc.
PCI Express Confi guration
PCI Express Clock Gating
PCI Express Root Port 1
PCI Express Root Port 5
PCI Express Root Port 6
PCI Express Root Port 7
PCIE Port 8 is assigned to LAN
[Enabled]
Chipset
Select Screen
Select Item
Enter: Select
+/-: Change Opt.
F1: General Help
F2: Previous
Values
F3: Optimized
Defaults
ESC: Exit
PCI Express Clock Gating
Enables or disables PCI Express Clock Gating for each root port.
PCI Express Root Port 1, port 5 to PCI Express Root Port 7
Controls the PCI Express Root Port.