4 graphics-controller, Lvds, Sdvo – ADLINK CoreExpress-ECO2 User Manual
Page 14: Lvds / sdvo configuration, Graphics-controller

TME-CEM-ECO2-Rev0V4.doc
Rev 0.4
Page 10
3.4 Graphics-Controller
The CoreExpress-ECO2's graphics controller is integrated in E6xxT CPU. It features a 2D/3D engine
and supports two dedicated display ports.
LVDS
The CoreExpress-ECO2 supports LVDS displays. The specification for LVDS is:
•
data format 18/24bits (single channel)
display backlight support (Intel´s display power saving technology or optional SMC)
maximum pixel clock rate up to 80 MHz.
maximum resolution up to 1280x768 @ 60 Hz, Minimum pixel clock is 19.75 MHz
SDVO
•
Digital Display port SDVO for ADD2 card or SDVO-DVI transmitter on carrier
maximum resolution up to 1280x1024 @ 85 Hz
maximum pixel clock rate up to 160 MHz
LVDS / SDVO Configuration
The following display modes are supported:
- USB-1901 (84 pages)
- USB-1210 (54 pages)
- USB-2401 (60 pages)
- USB-7230 (50 pages)
- USB-2405 (56 pages)
- DAQe-2010 (92 pages)
- DAQe-2204 (100 pages)
- DAQe-2213 (94 pages)
- DAQe-2501 (74 pages)
- PXI-2010 (84 pages)
- PXI-2020 (60 pages)
- PXI-2501 (62 pages)
- cPCI-9116 (98 pages)
- ACL-8112 Series (93 pages)
- ACL-8112 Series (94 pages)
- ACL-8112 Series (92 pages)
- ACL-8216 (75 pages)
- ACL-8111 (61 pages)
- PCM-9112+ (10 pages)
- PCM-9112+ (94 pages)
- cPCI-6216V (47 pages)
- ACL-6126 (28 pages)
- ACL-6128A (40 pages)
- PCM-6308V+ (52 pages)
- PCM-6308V+ (4 pages)
- PCI-7444 (82 pages)
- PCI-7434 (48 pages)
- PCI-7234 (56 pages)
- PCI-7260 (66 pages)
- PCI-7258 (38 pages)
- PCI-7256 (48 pages)
- PCI-7250 (48 pages)
- LPCI-7250 (48 pages)
- PCI-7396 (65 pages)
- PCI-7296 (59 pages)
- PCI-8554 (67 pages)
- PCIe-7360 (94 pages)
- PCIe-7350 (86 pages)
- PCIe-7300A (114 pages)
- PCIe-7200 (51 pages)
- PCI-7300A (112 pages)
- PCI-7300A (83 pages)
- PCI-7200 (96 pages)
- cPCI-7300 (82 pages)
- cPCI-7300 (83 pages)