3 interfaces, Parallel lcd video, 18/24 bit lvds lcd – ADLINK LEC-iMX6 User Manual
Page 15: 3interfaces, 1 parallel lcd video
Interfaces
11
LEC-iMX6
3
Interfaces
This section provides descriptions of the interfaces and signals within the SMARC P-S (Pri-
mary-Secondary) connector.
The SMARC P-S connector provides the following features:
Parallel LCD
LVDS
HDMI
Camera PCAM
Camera MIPI-CSI
PCIe
Gb Ethernet
USB 2.0 (Host and OTG)
SATA
I2C
SPI
Serial
SPDIF
I2S
CAN
SD/SDIO
eMMC
GPIO
AFB (Alternate Function Block; used for Media Local Bus [MLB])
Debug
NOTE: ADLINK Technology Inc. only supports the features/options tested and listed in this man-
ual. The main chips used in the LEC-iMX6 may provide more features or options than are listed
for the LEC-iMX6, but some of these features or options are not supported on the module and
will not function as specified in the chip documentation.
3.1 Parallel LCD Video
The Parallel LCD interface on the LEC-iMX6 can be used in 18-Bit or 24-Bit modes at up to 225
Mpixels/sec.
The voltage level of the LCD interface is 1.8V.
The Parallel LCD interface uses the I2C2 interface from the i.MX 6. At the SMARC connector
the signal names are I2C_LCD_CK and I2C_LCD_DAT. The I2C interface is also shared
onboard with I2C_GP_CK and I2C_GP_DAT at the SMARC connector and with the PMIC I2C
interface.
3.2 18/24 Bit LVDS LCD
The module routes single-channel LVDS output from the CPU through the following SMARC
interface pins:
1 Clock pair (S134/S135)
4 Data pairs (S125/S126; S128/S129; S131/S132; S137/S138)
The LVDS port can support up to 165 Mpixels/sec and voltage levels of the LVDS specification.