3 programming information, 1 sdp register, Chapter 3, programming information – ADLINK PMC-8246 User Manual

Page 23: Sdp register, Figure 3-1: wdt & bypass control logic, 3programming information

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Programming Information

PMC-8246

Programming Information

3.1

SDP Register

Block Diagram and 82546GB The following block diagram (identi-
cal to chapter 1) illustrates the bypass control signals. Program-
mers need to know how to access the 82546GB on the PMC and
its Software Defined Pins (SDP). Please refer to the 82546GB pro-
gramming document for detailed information.

Figure 3-1: WDT & Bypass Control Logic

WDT

Time Out

WDT_VP0

WDT_VP1

82546GB

SPDB6

SPDB[0:1]

SPDA7

SPDA0

SPDA1

SPDA6

SPDA7

Bypass

Control

Logic

WDT_RL

MODE[0:1]

WDT_EN

WDTV SEL

Control

Relay

Array

Bypass State feedback

WDT_DIS

CLK

BYPASS
NORMAL

PONSTS

Time Out status feedback

Control Switch

PCI_RESET

SWX1