ADLINK cPCI-6930 - Manual (Page 31)

Functional Description 17
cPCI-6930
3.2 Chipset
The cPCI-6930 incorporates the Intel® C604 Platform Controller
Hub (PCH).
Intel® C604 Platform Controller Hub
X PCI Express Base Specification, Revision 2.0 support for up
to eight ports with transfer rate up to 5 GT/s
X ACPI Power Management Logic Support, Revision 4.0a
X Enhanced DMA controller, interrupt controller, and timer
functions
X Integrated Serial ATA host controllers with independent
DMA operation on up to six ports
X USB host interface with two EHCI high-speed USB 2.0 Host
controllers and two rate matching hubs provide support for
up to fourteen USB 2.0 ports
X Integrated 10/100/1000 Gigabit Ethernet MAC with System
Defense
X System Management Bus (SMBus) Specification, Version
2.0 with additional support for I2C devices
X Supports Intel® High Definition Audio
X Supports Intel® Rapid Storage Technology
X Supports Intel® Virtualization Technology for Directed I/O
X Integrated Clock Controller
X Analog and Digital Display ports
X Low Pin Count (LPC) interface
X Firmware Hub (FWH) interface support
X Serial Peripheral Interface (SPI) support
3.3 PMC/XMC Site
The cPCI-6930 supports one PMC or XMC site for front panel I/O
expansion. The PMC site provides a maximum 32/64-bit,
33/66/133MHz PCI bus link using a Pericom PI7C9X130
PCIe-to-PCI-X bridge and PCIe x4 link. The PMC site supports
+3.3V and 5V signaling. The XMC site provides a PCIe x8 lane.