Maxim Integrated MAX2769 GPS Receiver - Manual (Page 8)

This register:
Sets fractional division ratio = 80000 (default)
Selects nominal current and filter trim values
STRM: Test: 8000000
This register:
Sets nominal stream interface control to start at a frame given by FRAME_COUNT
CLK: Test: 10061B2
This register:
Sets the L counter to 256
Sets the M counter to 1563
Selects a fractional clock input to the fractional clock divider to come after the reference divider
Selects the serializer clock to come from the reference divider
(When integer-N is selected in the PLL Config register, these settings are not used.)
TEST1: Test: 1E0F401
This register is reserved for Test
TEST2: Test: 14C0002
This register is reserved for Test
The screen format for setting configurations is shown in Figure 1.
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