Maxim Integrated Corona (MAXREFDES12) ZedBoard - Manual (Page 3)

Corona (MAXREFDES12#) ZedBoard Quick Start Guide
3
1. Required Equipment
• PC with Windows® OS with Xilinx® ISE®/SDK version 14.2 or later and one
USB port (Refer to Xilinx AR# 51895 if you installed ISE WebPACK
TM
design
software on your PC.)
• License for Xilinx EDK/SDK version 14.2 or later (free WebPACK license is OK)
• Corona (MAXREFDES12#) board
• ZedBoard TM
development kit
• One 24V 1A DC power supply
2. Overview
Below is a high-level overview of the steps required to quickly get the Corona design
running by downloading and running the FPGA project. Detailed instructions for each
step are provided in the following pages. The Corona (MAXREFDES12#) subsystem
reference design will be referred to as Corona throughout this document.
1) Connect the Corona board to the JA1 port of a ZedBoard as shown in Figure 1 .
Ensure the connector is aligned as shown in Figure 2 .
2) Download the latest RD12V01_00.ZIP file located at the Corona page.
3) Extract the RD12V01_00.ZIP file to a directory on your PC.
4) Open the Xilinx SDK.
5) Download the bitstream (.BIT) file to the board. This bitstream contains the FPGA
hardware design and software bootloader.
6) Use Xilinx SDK to download and run the executable file (.ELF) on one of the two
ARM
®
Cortex
TM
-A9 processors.