Kontron CPCI Generic backplane - Manual (Page 25)

CPCI Backplane General
ID 24229, Rev. 01 © 2002 PEP Modular Computers GmbH Page 11
3.3 Signalling Environment
Each CompactPCI backplane supports a 5V or a 3.3V signaling environment (VIO), and PCI
allows for two types of buffer interfaces for interboard connection. However, a gradual shift to
3.3V is occurring as the semiconductor industry shifts to the lower power interface for speed
and power dissipation reasons. For this reason, the
PEP Modular Computers system back-
planes are also designed for 3.3V usage.
3.4 Rear I/O Connectivity
According to PICMC CompactPCI Specification, V. 2.0, R. 3.0, standard rear I/O connectivity
is provided on the P3 backplane connector. The standard rear I/O pinouts of the P3 connector
are shown in the Overview chapter of this manual.
In addition, board-specific rear I/O connectivity can be provided on one or more of the back-
plane connectors P2, P4, P5. For the pinouts of any board-specific rear I/O connectors please
refer to the User’s Manual of the relating board.
Warning!
Using both 3.3V and 5V boards within the same system may result in
damage to your equipment. Please note that the presence of only one
5V board determines a 5V signalling environment. The default setting
is 5V.
When changing the signalling environment from 5V to 3.3V or vice-
versa, please make sure that coding keys of the appropriate color are
used (see Coding Keys section of this chapter).