beautypg.com

4 i/o address map 4 - 5, 5 status register 0 (stat0) 4 - 6, 6 status register 1 (stat1) 4 - 7 – Kontron CP6004-SA User Manual

Page 10: 7 control register 0 (ctrl0) 4 - 8, 8 control register 1 (ctrl1) 4 - 8, 9 device protection register (dprot) 4 - 9, 10 reset status register (rstat) 4 - 10, 12 status register 2 (stat2) 4 - 12, 13 board id high byte register (bidh) 4 - 12, 14 board and pld revision register (brev) 4 - 13

background image

Preface

CP6004-SA

Page x

ID 1052-8529, Rev. 2.0

D R A F T — F O R I N T E R N A L U S E O N L Y

4-2

DIP Switch SW2 for CompactPCI Interface Configuration ......................... 4 - 4

4-3

DIP Switch SW3 for PMC Interface Configuration ..................................... 4 - 4

4-4

I/O Address Map ........................................................................................ 4 - 5

4-5

Status Register 0 (STAT0) .......................................................................... 4 - 6

4-6

Status Register 1 (STAT1) .......................................................................... 4 - 7

4-7

Control Register 0 (CTRL0) ....................................................................... 4 - 8

4-8

Control Register 1 (CTRL1) ....................................................................... 4 - 8

4-9

Device Protection Register (DPROT) ......................................................... 4 - 9

4-10 Reset Status Register (RSTAT) ................................................................ 4 - 10

4-11 Board Interrupt Configuration Register (BICFG) ...................................... 4 - 11

4-12 Status Register 2 (STAT2) ........................................................................ 4 - 12

4-13 Board ID High Byte Register (BIDH) ........................................................ 4 - 12

4-14 Board and PLD Revision Register (BREV) .............................................. 4 - 13

4-15 Geographic Addressing Register (GEOAD) ............................................. 4 - 13

4-16 Watchdog Timer Control Register (WTIM) ............................................... 4 - 15

4-17 Board ID Low Byte Register (BIDL) ......................................................... 4 - 16

4-18 LED Configuration Register (LCFG) ........................................................ 4 - 17

4-19 LED Control Register (LCTRL) ................................................................ 4 - 18

4-20 General Purpose Output Register (GPOUT) ............................................ 4 - 19

4-21 General Purpose Input Register (GPIN) .................................................. 4 - 19

5-1

Maximum Input Power Voltage Limits ........................................................ 5 - 3

5-2

DC Operational Input Voltage Ranges ....................................................... 5 - 3

5-3

Input Voltage Characteristics ..................................................................... 5 - 5

5-4

CP6004-SA in uEFI Shell Mode ................................................................. 5 - 7

5-5

CP6004-SA with Win. 7 and Processor and Graphics in Idle State ........... 5 - 7

5-6

CP6004-SA with Win. 7 and Max. Proc. Workload and Basic Graphics Oper. 5 - 7

5-7

CP6004-SA with Win. 7 and Max. Processor and Graphics Workload ...... 5 - 7

5-8

Power Consumption of CP6004-SA Accessories ...................................... 5 - 8

5-9

Power Consumption per Gigabit Ethernet Port ......................................... 5 - 8

5-10 PMC Module Current ................................................................................. 5 - 8

5-11 XMC Module Current ................................................................................. 5 - 9

A-1

MMADP-SATA01 Main Specifications ....................................................... A - 3

A-2

SATA Connector J2 Pinout ........................................................................ A - 5

B-1

SATA Flash Module Main Specifications ................................................... B - 3