Dell PowerEdge R820 - Manual (Page 6)

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BP FRU image FRU I2C interface via iDRAC
PCIe SSD Backplane
SEP internal flash Firmware + FRU I2C interface via iDRAC
H710, H810, H710M PERCs
NVSRAM Configuration data ROC writes configuration data to
NVSRAM
FRU Card manufacturing information Programmed at ICT during production.
1-Wire EEPROM Holds default controller properties/settings ROC writes data to this memory
SPD Memory configuration data Pre-programmed before assembly
SBR Bootloader Pre-programmed before assembly
SPI Flash FPGA configuration data Pre-programmed before assembly. Can
be updated using Dell/LSI tools
Flash Card firmware Pre-programmed before assembly. Can
be updated using Dell/LSI tools
ONFI Backup Flash Holds cache data during power loss FPGA backs up DDR data to this device in
case of a power failure
SDRAM Cache for HDD I/O ROC writes to this memory - using it as
cache for data IO to HDDs
H310, H310M PERCs
NVSRAM Configuration data ROC writes configuration data to
NVSRAM
FRU Card manufacturing information Programmed at ICT during production
1-Wire EEPROM Holds default controller properties/settings ROC writes data to this memory
SBR Bootloader Pre-programmed before assembly
Flash Card firmware Pre-programmed before assembly. Can
be updated using Dell/LSI tools
PCIe SSD Extension Card
Switch Configuration
EEPROM Configuration for PLX PCIe switch, setting
registers The EEPROM image is pre-loaded at
factory before assembly. Once
assembled on the card, data can be
entered via PLX Device Editor or PLX EEP
DOS based tool.