chiliGREEN D945GBZ - Manual (Page 52)

Intel Desktop Board D945GCZ Technical Product Specification
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Table 15. PCI Interrupt Routing Map
ICH7 PIRQ Signal Name
PCI Interrupt Source
PIRQA PIRQB PIRQC PIRQD PIRQE PIRQF PIRQG PIRQH
ICH7 LAN INTA
PCI bus connector 1 INTD INTA INTB INTC
PCI bus connector 2 INTC INTB INTA INTD
IEEE-1394a controller
(optional) INTA
NOTE
In PIC mode, the ICH7 can connect each PIRQ line internally to one of the IRQ signals (3, 4, 5, 6,
7, 9, 10, 11, 12, 14, and 15). Typically, a device that does not share a PIRQ line will have a unique
interrupt. However, in certain interrupt-constrained situations, it is possible for two or more of the
PIRQ lines to be connected to the same IRQ signal. Refer to Table 14 for the allocation of PIRQ
lines to IRQ signals in APIC mode.
PCI interrupt assignments to the USB ports, Serial ATA ports, and PCI Express ports are dynamic.