Cirrus Logic AN361 - Manual

Copyright  Cirrus Logic, Inc. 2011
(All Rights Reserved)
http://www.cirrus.com
Application Note
Link Capacitor Considerations
for CS1601 Applications
1. Introduction
Cirrus Logic's CS1601 is a digital power factor correction (PFC) controller engineered to deliver the lowest system
cost when designing electronic ballast and LED applications. The CS1601 digital controller is tailored for power con-
verter applications that use low-capacitance values on the link output, generally an electrolytic type. In some cases,
the limitations of an electrolytic life cycle may require the use of other capacitor types. This application note contains
an analysis of the use of film capacitors as an alternative that can increase the lifetime of the power converter sys-
tem. This document first explains how to calculate the link output capacitance and then presents a design example
to validate system performance.
2. Design Considerations
The capacitance of the link voltage capacitor is dependent on several parameters in a CS1601 controlled, PFC con-
verter. These parameters are as follows: system stability, link voltage ripple, RMS current in the capacitor, and hold-
up time. This application note’s step-by-step design example will permit the customer to choose the smallest capac-
itance possible for the link voltage capacitor and still meet all system requirements.
2.1 System Stability
To ensure system stability, the recommended capacitance-per-watt ratio of the link voltage capacitor should be
within the range of 0.25
F/watt to 0.5F/watt when V
link
= 460VAC. The capacitance-per-watt ratio range is
defined by the digital IC control algorithm. When using the CS1601 controller, it is not recommended to design
a PFC circuit using ratios outside the range stated above.
The V
link
voltage is controlled by adjusting the sensing resistors that connect the IC to the V
rect
and
V
link
voltages. If the specified V
link
voltage is altered, the link voltage capacitance should also be adjusted to
maintain system stability. The equation below is used to verify the capacitance-per-watt ratio:
2.2 Link Voltage Ripple
To meet the link output voltage ripple requirements, the following equation defines the size of the
output capacitor:
Where:
f
line(min)
= the minimum line frequency the PFC design is required to support
V
link
= the nominal DC output voltage from the PFC
V
link(rip)
= the output voltage ripple requirement in the volts, peak-to-peak
C
link ratio  
0.25 0.5 ~  
460
V
link
-------------
2
F watt   = [Eq. 1]
C
out rip  
P
o
2  f
line min  
V
link
V
link rip  
  
---------------------------------------------------------------------------------------- = [Eq. 2]
AN361
OCT’11
AN361REV2