Cirrus Logic AN253 - Manual

1
Copyright  Cirrus Logic, Inc. 2004
(All Rights Reserved)
http://www.cirrus.com
AN253
Optimizing Code Speed for the MaverickCrunch
™
Coprocessor
Brett Davis
1. Introduction
This application note is intended to assist developers in optimizing their source code for use with the Mav-
erickCrunch coprocessor. This document begins with a brief overview of the MaverickCrunch coproces-
sor, followed by optimization guidelines and concludes with an example applying the guidelines
discussed.
Multiple facets of code optimization must be considered in order to realize the full benefit of the Maverick-
Crunch coprocessor. The guidelines in this document are categorized as algorithm, compiler, or hardware
optimizations. The discussion on algorithm optimization centers on high level programming details such
as compound expressions and loop unrolling. Next, the compiler optimization guidelines deal with the ef-
fects of compiler optimization on code performance - primarily code size and execution speed. Finally, the
hardware optimization section enumerates optimization guidelines related to the MaverickCrunch copro-
cessor implementation such as IEEE-754 implementation and pipeline stalls.
Note: Algorithm selection will not be discussed in this applications note. It is assumed that the
developer has selected and implemented the correct algorithm for their application.
2. MaverickCrunch
This section introduces and summarizes the features, instruction set and architecture of the Maverick-
Crunch coprocessor. For further in-depth information on these topics, please read Chapter 3 of the User's
Guide.
2.1 Features
The MaverickCrunch coprocessor accelerates IEEE-754 floating point arithmetic, and 32-bit and 64-bit
fixed point arithmetic. The MaverickCrunch coprocessor is an excellent candidate for encoding and de-
coding digital audio, digital signal processing (such as IIR, FIR, FFT) and numeric approximations. Key
features of the MaverickCrunch include:
- IEEE-754 based single and double precision floating point support
- Full IEEE-754 rounding support
- Inexact, Overflow, Underflow, and Invalid Operator IEEE-754 exceptions
- 32/64-bit fixed point integer operations
- Add, multiply, and compare functions for all data types
- Fixed point integer MAC 32-bit input with 72-bit accumulate
- Fixed point integer shifts
JAN ‘04
AN253REV1