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Frame reception, Schematic and layout review service, Unsupported functions in 8 bit mode – Cirrus Logic AN181 User Manual

Page 2: Contacting cirrus logic support, An181

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AN181

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AN181REV1

ing the high order byte, 00h, to 305h. Next write
0051h (81 decimal) to the TxLENGTH port. Low
byte, 51h, to 306h then high byte, 00h, to 307h.

Now check to see if transmit space is available.

This is done by checking the BusST register, bit 8.
To check this register you will use the packet page
pointer port and the packet page data port.

Write 0138h to Packet Page Pointer (starts at 30Ah)
then read the Packet Page Data Port 0 (starts at
30Ch). If bit 8 (Rdy4TxNow) is set then you can
start transferring data to Transmit Data Port 0. Do
so in the following manner: write the first byte to
300h, the second byte to 301h, byte 3 to 300h, byte
4 to 301h and so on until the whole frame is written.
The chip will automatically send the frame after the
last byte is written.

Frame Reception

The host is notified of an incoming frame by poll-
ing the Rx Event Register. When the host is aware
of an incoming frame the software should read the
frame data following these steps (assuming I/O
base 300h):

read the RxStatus word (same data as RxEvent,
register) from data port 0. Read this high order
byte 301h first, then low order byte 300h.

Note: it is very important to read the RxStatus
and RxLength high order byte first.

read the RxLength word (the frame length)
from data port 0. Read this high order byte
301h first, then low order byte 300h.

begin reading the frame data, 300h then 301h,
300h then 301h until the entire frame has been
transferred to host memory.

Schematic and Layout Review Service

Prevent problems early in the design phase of your
product. Have your schematic or layout reviewed
free of charge by our experts before you build your
board. Call Applications Engineering at (512) 442-
7555 or send e-mail to [email protected]
rus.com.

Unsupported functions in 8 bit mode

Interrupts are not supported. Polled mode must
be used.

The DMA engine only uses 16 bit memory ac-
cesses and does not support 8 bit transfers.

The packet page pointer has an auto increment
feature that cannot be used in 8 bit mode.

An EEPROM is not supported. Most 8 bit de-
signs should not require one and can eliminate
the added cost.

Contacting Cirrus Logic Support

For a complete listing of Direct Sales, Distributor, and Sales Representative contacts, visit the Cirrus Logic web site at:
http://www.cirrus.com/corporate/contacts/

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