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Figure 4. timing circuitry, Dual line interface unit – Cirrus Logic CDB61584A User Manual

Page 9

background image

DS261DB2

59

CDB61584A

Dual Line Interface Unit

RV

+

1

RG

ND1

MOD

E

BG

R

E

F

AG

N

D

AV

+

RE

S

E

T

RE

F

C

L

K

XT

AL

O

U

T

1X

CLK

RG

N

D

2

RV

+

2

U7

CS61584A

TIMING CIRCUITRY

29

40

C5

.1

µ

F

VD+

R23

47K

R10

4.

99k

C6

C7

.1

µ

F

1.0

µ

F

VD+

VD+

VD+

SW1

1

2

R11

10K

Y1

1X

CLK

4

2

1

3

J14

8

VCC

GND

C14

.1

µ

F

U4

REFCLK

J15

C8

.1

µ

F

VD+

J 10
(must not
be jumped)

VA+

30

31

32

33

34

35

36

37

38

39

SW6

Figure 4. Timing Circuitry