Cirrus Logic CDB5529 - Manual (Page 4)

CDB5
529
4
DS246DB1
CS
R1 1
200 Ω
SDI
R2 2
200 Ω
SDO
R3 3
200 Ω
SCLK
R4 4
200 Ω
D1
R5 5
200 Ω
D0
R6 6
200 Ω
A1
R7 7
200 Ω
A0
R8 8
200 Ω
18
Y1
11.0592MHz
19
C23
33pF
C0G
C24
33pF
C0G
9
+5V Digital
40
+5V Digital
39
R13
10k Ω
+ 1 8
+ 2 7
+ 3 6
+ 4 5
R12
5.11k Ω
R11
5.11k Ω
R10
5.11k Ω
14
13
12
11
10
C7
47µF
C17
0.1µF
+
Test Switch 1
Test Switch 2
Test Switch 3
21
22
23
24
S1
D1
LED_555_5003
RESET
COMM
GAINCAL
OFFSETCAL
JP2
P1.0
P1.1
P1.2
P1.3
P1.4
P1.5
P1.6
P1.7
XTAL1
XTAL2
C19
0.1µF
Bypass
Cap
RST
VSS
20
VDD
P0.0
P3.0
P3.1
P3.2
P3.3
P3.4
P2.0
P2.1
P2.2
P2.3
From RS-232
TXD
RXD
TP71
TP72
16
15
14
13
12
11
Normal
Loopback
C28
10µF +
2 4
U1
MC145407
C27
10µF +
3
1
C25
10µF +
18
20
5
6
7
8
9
10
C2-
C2+
C1-
C1+
VCC VDD
17
+5V Digital
C26
10µF
+
R14
10k Ω
5
6
7
8
4
1
9
3
2
RI
TXD
RXD
RTS
CTS
DTR
DSR
DCD
UM1
80C51
From
Figure 1
To RS-232
HDR7
D2
R19
200
Ω
D3
R20
200 Ω
P3.5
P3.6
HDR10
1 2
3 4
5 6
9 8
11 10
13 12
RESET
+5V Digital
R9
750k Ω
C18
0.1µF
D4
1N4148
TP65
TP64
TP63
TP62
TP61
14
17 U5
SN74HC14N
J2
Figure 2. Digital Schematic Section