Cirrus Logic CDB5381 - Manual (Page 3)

DS563DB1 3
CDB5381
1. CDB5381 SYSTEM OVERVIEW
The CDB5381 evaluation board is an excellent means of quickly evaluating the CS5381. The
CS8406 digital audio interface transmitter provides an easy interface to digital audio signal ana-
lyzers including the majority of digital audio test equipment.
The CDB5381 schematic has been partitioned into 7 schematics shown in Figure 2 through
Figure 8 . Each partitioned schematic is represented in the system diagram shown in Figure 1 .
Notice that the system diagram also includes the interconnections between the partitioned sche-
matics.
2. CS8406 DIGITAL AUDIO TRANSMITTER
The system generates and encodes standard S/PDIF data using a CS8406 Digital Audio Trans-
mitter (see
Figure 6 ). The outputs of the CS8406 are RS422 compatible differential line drivers.
The CS8406 supports both Left Justified and I
2
S data formats, as determined by the DIP switch,
S2. A description of the CS8406 is included in the CS8406 datasheet.
3. INPUT/OUTPUT FOR CLOCKS AND DATA
The evaluation board has been designed to allow interfacing to external systems via the 10-pin
header, J13. The schematic for the clock/data input/output is shown in
Figure 5 .
The CDB5381 allows some flexibility as to the generation of the clocks. When the CS5381 and
CS8406 are in slave mode, the SCLK and LRCK must be provided via the header, J13. MCLK
must be generated from the on board oscillator, Y1. This oscillator is socketed to allow other fre-
quency oscillators to be used.
4. POWER SUPPLY CIRCUITRY
Power is supplied to the evaluation board by six binding posts (-12 V, +12 V, VD, VL, GND,
+5 V), see
Figure 8 . -12 V and +12 V supply the input amplifiers while the VD input supplies the
VD pin of the CS5381. VL supplies power to the VL pin of the CS5381 and to the level shifter
circuits. The +5 V input supplies power to the +5 V digital circuitry and the VA pin of the CS5381.
5. GROUNDING AND POWER SUPPLY DECOUPLING
The CS5381 requires careful attention to power supply and grounding arrangements to optimize
performance.
Figure 3 details the power distribution used on this board. The decoupling capac-
itors are located as close to the CS5381 as possible. Extensive use of ground plane fill in the
evaluation board yields large reductions in radiated noise.
6. ANALOG INPUT FILTER
The CDB5381 implements a fully differential analog input buffer, as shown in Figure 2 . Note that
there is no attenuation associated with the input buffer, so a 2 Vrms differential input applied at
the XLR connectors will provide a full-scale 2 Vrms differential input to the CS5381.