Cirrus Logic AN232 - Manual (Page 3)

AN232
3
Figure 3. AK5393 Typical Connection Diagram
VREFL
AINL+
AINL-
V
0.1
A/D CONVERTER
AK5393
AINR+
AINR-
VCOML
10 µ F
+
RST
VA D
+5V
10 µ F
+5V to 3.3V
10 µ F
+ +
SDATA
CAL
Reset and
Calibration
Control
Audio Data
Processor
Timing Logic
and Clock
SMODE2
SMODE1
GNDL
DFS
Analog
Input
Buffer
(Section 8)
Analog
Input
Buffer
(Section 8)
ZCAL
0.22 µ F
0.1
µ F
AGND DGND BGND TEST
µ F 0.1 µ F
VREFR
0.1
VCOMR
10 µ F
+
GNDR
0.22 µ F
µ F
HPFE
Mode
Control
LRCK
FSYNC
SCLK
MCLK