10 s, Confidenti a l dra ft delp hi – Cirrus Logic CS48DV2B User Manual
Page 15
CS48DV2B Data Sheet
32-bit Audio DSP for Dedicated Dolby Volume and Audistry by Dolby
DS875F2
Copyright 2009 Cirrus Logic
15
CONFIDENTIAL
CONFIDENTI
A
L
DRA
FT
DELP
HI
5.10 Switching Characteristics — Serial Control Port - SPI Master Mode
Figure 4. Serial Control Port - SPI Master Mode Timing
Parameter
Symbol
Min
Typical
Max
Units
SCP_CLK frequency
1
1. The specification f
spisck
indicates the maximum speed of the hardware. The system designer should be aware that the actual
maximum speed of the communication port may be limited by the firmware application.
f
spisck
-
F
xtal
/2
2
2. See
MHz
SCP_CS falling to SCP_CLK rising
3
3. SCP_CLK PERIOD refers to the period of SCP_CLK as being used in a given application. It does not refer to a tested parameter
t
spicss
-
11*DCLKP +
(SCP_CLK PERIOD)/2
-
ns
SCP_CLK low time
t
spickl
20
-
ns
SCP_CLK high time
t
spickh
20
-
ns
Setup time SCP_MISO input
t
spidsu
9
-
ns
Hold time SCP_MISO input
t
spidh
5
-
ns
SCP_CLK low to SCP_MOSI output valid
t
spidov
-
8
ns
SCP_CLK low to SCP_CS falling
t
spicsl
7
-
ns
SCP_CLK low to SCP_CS rising
t
spicsh
-
11*DCLKP +
(SCP_CLK PERIOD)/2
-
ns
Bus free time between active SCP_CS
t
spicsx
3*DCLKP
-
ns
SCP_CLK falling to SCP_MOSI output high-Z
t
spidz
-
20
ns
EE_CS#
SCP_CLK
SCP_MISO
SCP_MOSI
0
1
2
6
7
0
5
6
7
t
spicss
t
spickl
t
spickh
t
spidsu
t
spidh
t
spidov
A6
A5
A0
R/W
MSB
LSB
MSB
LSB
t
spicsh
t
spicsx
f
spisck
t
spidz
t
spicsl