Cirrus Logic CDB4354 - Manual (Page 4)

4 DS895DB1
CDB4354
Power consumption of the CS4354 can be calculated with the measured voltage drop at J4 and J5 when
the shunts are removed.
WARNING: Refer to the CS4354 datasheet for maximum allowable voltages levels. Operation outside of
this range can cause permanent damage to the device.
1.5 Grounding and Power Supply Decoupling
As with any high-performance converter, the CS4354 requires careful attention to power supply and ground-
ing arrangements to optimize performance.
Figure 3 details the connections to the CS4354 and Figures 5 ,
6 , and 7 show the component placement and top and bottom layout. The charge-pump and decoupling ca-
pacitors are located as close to the CS4354 as possible.
1.6 Hardware Control
The CDB4354 includes several shuntable jumper pin blocks to test CS4354-specific and board features,
such as:
• De-emphasis and Internal Serial Clock select for the CS4354
• Manual reset for the CS8416
• +5 V/+3.3 V select for the VL supply
Please use Table 2 as a guide to the possible configurations for these controls.
1.7 Analog Output Filtering
The analog output filter circuitry on the CDB4354 has been designed according to the CS4354 datasheet.
This circuit is a first order resistor-capacitor low pass filter with values 470
/2.2 nF, respectively, which sets
the -3 dB pole at 154 kHz. The resulting filter keeps signal attenuation below 0.1 dB at 20 kHz while provid-
ing sufficient filtering for noise outside the audio band.