3 chipset, Chipset -24, Chipset – Asus M3A78-EM User Manual
Page 76: Northbridge configuration
2-24
Chapter 2: BIOS setup
2.4.3.
Chipset
Chipset Configuration
NorthBridge Configuration
Internal Graphics
Memory Options &
Information
NorthBridge Configuration
NorthBridge Chipset Configuration
Memory Configuration
ECC Configuration
Memory CLK
:333MHz
CAS Latency(Tc1)
:5.0
RAS/CAS Delay(Trcd)
:5 CLK
Row Precharge Time(Trp) :5 CLK
Min Active RAS(Tras)
:15 CLK
RAS/RAS Delay(Trrd)
:3 CLK
Row Cycle(Trc)
:21 CLK
Bank Interleaving [Auto]
Allows you to enable the bank memory interleaving.
Configuration options: [Disabled] [Auto]
Channel Interleaving [Disabled]
Allows you to enable the channel memory interleaving.
Configuration options: [Disabled] [Address bits 6]
[Address bits 12] [XOR of Address bits [20:16, 6]]
[XOR of Address bits [20:16, 9]]
Memory Configuration
Advanced
Memory Configuration
Bank Interleaving
[Auto]
Channel Interleaving
[Disabled]
MemClk Tristate C3/ATLVID
[Disabled]
Memory Hole Remapping
[Enabled]
DCT Unganged Mode
[Auto]
Power Down Enable
[Enabled]
Enable Bank Memory
Interleaving