Teledyne LeCroy QPHY-DDR3 - Manual (Page 26)

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QPHY-DDR3 TEST CONFIGURATIONS
Configurations include variable settings and limit sets as well, not just test selections. See the section for
a description of each variable value and its default value. See the QPHY-DDR3 Limit Sets section for
more information about the limit sets.
1) Clock tests DDR3-1333 (1 Probe)
This configuration runs all of the clock tests. All of the variables are set to their defaults. The limit set in
use is DDR3-1333. The tests run are:
• tCK(avg)
• tCK(abs)
• tCH(avg)
• tCL(avg)
• tCH(abs)
• tCL(abs)
• tJIT(duty)
• tJIT(per)
• tJIT(CC)
• tERR(n per)
2) CKdiff-DQse-DQSdiff 1333 Write Burst (3 Probes)
This configuration runs all of the tests that are run on write bursts of the DDR3 signals in which 3 probes
are required. All of the variables are set to their defaults. The limit set in use is DDR3-1333. The tests run
are:
• Eye Diagram – Write Bursts (Inputs)
• SlewR
• SlewF
• VIH(ac)
• VIH(dc)
• VIL(ac)
• VIL(dc)
• tDVAC
• tVAC
• AC Overshoot peak amplitude
• AC Overshoot area above VDDQ
• AC Undershoot Peak Amplitude
• AC Undershoot Area below VSSQ
• VOH(ac/dc)