SP / Silicon Power SP512MBLDU400K02 - Manual

DDR UDIMM w/o ECC
Product Datasheet
Rev. 1.0 Oct. 2011 1
Features
• 184pin, unbuffered dual in-line memory module (UDIMM)
• Fast data transfer rates: PC-2100, PC-2700, PC3-3200
• Single or Dual rank
• 256MB(32Megx64), 512MB (64Meg x 64), 1GB(128 Meg x 64)
• JEDEC standard 2.5V I/O (SSTL_2 compatible)
• V
DD
= V
DDQ
= 2.5V ±0.1V
• V
DDSPD
= 2.3V to 3.6V
• Internal, pipelined double data rate (DDR) 2n-prefetch architecture
• Bidirectional data strobe (DQS) transmitted/received with data—that is, source-synchronous data
capture
• Differential clock inputs (CK and CK#)
• Multiple internal device banks for concurrent operation
•Single or Dual rank
• Selectable burst lengths (BL) 2, 4, or 8
• Auto precharge option
• Auto refresh and self refresh modes: 7.8125μs maximum average periodic refresh interval
• Serial presence-detect (SPD) with EEPROM
• Selectable CAS latency (CL) for maximum compatibility
• Gold edge contacts
• Pb-free