SP / Silicon Power SP002GBLRE800S01 - Manual

DDR2 UDIMM with ECC
Product Specification
Features
• 240pin, unbuffered dual in-line memory module (UDIMM)
• Error Check Correction (ECC) Support
• Fast data transfer rates: PC2-4200, PC3-5300, PC3-6400
• Single or Dual rank
• 512MB (64Meg x 72), 1GB(128 Meg x 72), 2GB (256 Meg x 72)
• JEDEC standard 1.8V I/O (SSTL_18-compatible)
• V
DD
= V
DDQ
= 1.8V ±0.1V
• V
DDSPD
= 3.0V to 3.6V
• Differential clock inputs, Differential data strobe (DQS, DQS#) option
• 4n-bit prefetch architecture
• Multiple internal device banks for concurrent operation
• Programmable CAS latency (CL)
• Posted CAS additive latency (AL)
• WRITE latency = READ latency - 1 tCK
• Programmable burst lengths (BL): 4 or 8
• Adjustable data-output drive strength
• 64ms, 8,192-cycle refresh
• On-die termination (ODT)• Serial presence-detect (SPD) EEPROM
• Gold edge contacts
• Pb-free
Rev. 1.2 Aug. 2011 1