Asus P4P800-MX User Manual
Page 16
1-6
Chapter 1: Product introduction
ATX 12V connector. This power connector connects the 4-pin 12V plug from
the ATX 12V power supply.
CPU socket. A 478-pin surface mount, Zero Insertion Force (ZIF) socket for
the Intel
®
Pentium
®
4 Processor, with 800/533/400 MHz system bus that allows
6.4GB/s, 4.3GB/s, and 3.2GB/s data transfer rates, respectively.
North bridge controller. The Intel
®
865GV Memory Controller Hub provides
the processor interface with 800/533/400 MHz frequency, system memory
interface at 400/333/266MHz operation. The GMCH interconnects to the
south bridge ICH5 via the Intel
®
Hub Architecture.
DDR DIMM sockets. These four 184-pin DIMM sockets support up to 4GB
system memory using unbuffered non-ECC PC3200/2700/2100 DDR DIMMs.
ATX power connector. This 20-pin connector connects to an ATX power
supply. The power supply must have at least 1A on the +5V standby lead
(+5VSB).
Super I/O controller. This Winbond Low Pin Count (LPC) interface provides
the commonly used Super I/O functionality. The chipset supports a high-
performance floppy disk controller for a 360K/720K/1.44M/2.88M floppy disk
drive, a multi-mode parallel port, two standard compatible UARTs, and a Flash
ROM interface. This controller also integrates the ASIC for PC health
monitoring.
Floppy disk connector. This connector accommodates the provided ribbon
cable for the floppy disk drive. One side of the connector is slotted to prevent
incorrect insertion of the floppy disk cable.
IDE connectors. These dual-channel bus master IDE connectors support
Ultra ATA100/66/33, PIO Modes 0~4 IDE devices. Both the primary (blue) and
secondary (black) connectors are slotted to prevent incorrect insertion of the
IDE ribbon cable.
Flash EEPROM. This 4Mb firmware contains the programmable BIOS
program.
SATA connectors. These connectors support Serial ATA HDDs and allows
for up to 150MB/s data transfer rate, faster than the standard Parallel ATA
by 17MB/s.
South bridge controller. The fifth-generation Intel I/O Controller Hub
(ICH5) is a subsystem that integrates various I/O functions including 2-
channel ATA100 bus master IDE controller, up to eight USB 2.0/1.1 ports, I/
O APIC, SMBus 2.0 controller, LPC interface, AC’97 2.2 interface, and PCI
2.2 interface. The ICH5 also contains the necessary arbitration and
buffering for efficient utilization of these interfaces.
Standby power LED. This LED lights up if there is a standby power on the
motherboard. This LED acts as a reminder to turn off the system power before
plugging or unplugging devices.
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