Impulse 7202 - Manual (Page 8)

Technical Description
Sealevel Systems COMM+232.PCI Page 5
Technical Description
The Sealevel Systems COMM+232.PCI provides a PCI interface adapter with 2
asynchronous serial ports providing a versatile interface for modems, printers
and plotters.
The COMM+232.PCI utilizes the 16550 UART. This chip features
programmable baud rates, data format, interrupt control and a 16-byte input and
output FIFO. A full array of advanced UARTS is also available for this card.
Contact Sealevel Systems for more information.
Interrupts
A good description of an interrupt and its importance to the PC can be found in
the book ‘Peter Norton’s Inside the PC, Premier Edition’:
A good analogy of a PC interrupt would be the phone ringing. The phone ‘bell’
is a request for us to stop what we are currently doing and take up another task
(speak to the person on the other end of the line). This is the same process the
PC uses to alert the CPU that a task must be preformed. The CPU upon receiving
an interrupt makes a record of what the processor was doing at the time and
stores this information on the ‘stack’; this allows the processor to resume its
predefined duties after the interrupt is handled, exactly where it left off. Every
main sub-system in the PC has it’s own interrupt, frequently called an IRQ (short
for Interrupt ReQuest).
In these early days of PC’s Sealevel Systems decided that the ability to share
IRQs was an important feature for any add-in I/O card. Consider that in the IBM
XT the available IRQs were IRQ0 through IRQ7. Of these interrupts only IRQ2-
5 and IRQ7 were actually available for use. This made the IRQ a very valuable
system resource. To make the maximum use of these system resources Sealevel
Systems devised an IRQ sharing circuit that allowed more than one port to use a
selected IRQ. This worked fine as a hardware solution but presented the software
designer with a challenge to identify the source of the interrupt. The software
designer frequently used a technique referred to as ‘round robin polling’. This
method required the interrupt service routine to ‘poll’ or interrogate each UART
as to its interrupt pending status. This method of polling was sufficient for use
with slower speed communications, but as modems increased their throughput
abilities this method of servicing shared IRQs became inefficient.
Why use an ISP?
The answer to the polling inefficiency is the Interrupt Status Port (ISP). The ISP
is a read only 8-bit register that sets a corresponding bit when an interrupt is
pending. Port 1 interrupt line corresponds with Bit D0 of the status port, Port 2
with D1 etc. The use of this port means that the software designer now only has
to poll a single port to determine if an interrupt is pending.