Diodes AP3433 - Manual (Page 2)

Preliminary Datasheet
3A, 2MHz High Performance Synchronous Buck Converter AP3433
Jul. 2012 Rev. 1. 1 BCD Semiconductor Manufacturing Limited
2
Pin Configuration
FN Package
(QFN-3×3-16)
VIN
VIN
GND
GND SS
SW
SW
SW
E P
5 6 7 8
1
2
3
4 9
12
Pin 1 Mark
11
10
13 14 15 16
Figure 2. Pin Configuration of AP3433 (Top View)
Pin Description
Pin Number Pin Name Function
1,2,16 VIN
Supply input pin. A capacitor should be connected between the VIN and GND
pin to keep the DC input voltage constant
3,4 GND
Power ground. This pin should be electrically connected to the power pad under
the IC
5 AGND
Analog ground. This pin should be electrically connected to GND close to the
device
6 FB Feedback pin. Inverting node of the transconductance error amplifier
7 COMP
Compensation pin. This pin is the output of the transconductance error amplifier
and the input to the current comparator. Connect external compensation elements
to this pin to stabilize the control loop
8 RT/CLK Resistor timing or external clock input pin
9 SS
Soft-start pin. An external capacitor connected to this pin sets the output voltage
rise time. This pin can also be used for tracking
10,11,12 SW
Internal power switch output pin. This pin is connected to the inductor and
bootstrap capacitor
13 BOOT
Bootstrap pin. A bootstrap capacitor is connected between the BOOT pin and SW
pin. The voltage across the bootstrap capacitor drives the internal high-side power
MOSFET
14 PGD
Power good indicator output. Asserts low if output voltage is low due to thermal
shutdown, over-current, over/under-voltage or EN shut down
15 EN
Enable pin, internal pull-up current source. Pull below 1.2V to disable. Float to
enable. Can be used to set the on/off threshold (adjust UVLO) with two additional
resistors